ST=0, TRS=0, BBSY=0, RS=0, MST=0, SP=0
I2C Bus Control Register 2
| Reserved | This bit is read as 0. The write value should be 0. |
| ST | Start Condition Issuance Request Set the ST bit to 1 (start condition issuance request) when the BBSY flag is set to 0 (bus free state). 0 (0): Does not request to issue a start condition. 1 (1): Requests to issue a start condition. |
| RS | Restart Condition Issuance Request Note: Do not set the RS bit to 1 while issuing a stop condition. 0 (0): Does not request to issue a restart condition. 1 (1): Requests to issue a restart condition. |
| SP | Stop Condition Issuance Request Note: Writing to the SP bit is not possible while the setting of the BBSY flag is 0 (bus free state). Note: Do not set the SP bit to 1 while a restart condition is being issued. 0 (0): Does not request to issue a stop condition. 1 (1): Requests to issue a stop condition. |
| Reserved | This bit is read as 0. The write value should be 0. |
| TRS | Transmit/Receive Mode 0 (0): Receive mode 1 (1): Transmit mode |
| MST | Master/Slave Mode 0 (0): Slave mode 1 (1): Master mode |
| BBSY | Bus Busy Detection Flag 0 (0): The I2C bus is released (bus free state). 1 (1): The I2C bus is occupied (bus busy state). |